Heterogeneous Integration: A Revolution for the Semiconductor Industry
11 AUG 2021
More data, more powerful chips. These days, semiconductors are at the heart of the technologies we all use at work and at home. Chips have become incredibly complex, and this is revolutionizing the way in which semiconductor companies approach chip design.
It involves using advanced packaging technologies rather than conventional monolithic chip design to integrate separate chip IP blocks, optimize them according to the manufacturing node used and customize them for different customer products. With our materials and solutions, we at EMD Electronics are positioned to make a significant contribution to enabling these kinds of technological developments.
Data volumes are increasing rapidly
The past year, and in particular the Covid-19 pandemic, have proven that humans increasingly depend on technology. Working from home, distance learning and even telemedicine will become part of our everyday lives in the future. Therefore, digital tools increasingly need to be able to run uninterrupted. This results in an exponential increase in data volumes. According to the International Data Corporation (IDC), more than 64 zettabytes (ZB) of data were generated, collected, copied, and consumed worldwide in 2020. For perspective, that's a number with 21 zeros. The challenge is now to process and store these almost unimaginable quantities of data. This requires powerful chips but the space available for these increasing amounts of data is limited.
“More than Moore”
For a long time now, the semiconductor industry has been driven by "Moore's Law," an observation by Intel co-founder Gordon Moore in 1965 that the number of components (transistors) in a given area doubles about every two years. Moore’s Law continues to be at the heart of the semiconductor industry and has guided it in scaling technology nodes from tens of microns (1 micron = 0.001 millimeter) to the nodes of today, which are 5 nm or smaller (1 nanometer = 0.000001 mm). However, the industry has also increasingly started using the third dimension. This shift was largely pioneered by 3D NAND with which arrays of nearly 200 layers are now commonplace. The future of logic devices will generally be defined by the following three aspects: continued fab scaling (“More Moore”) over at least the next decade to improve transistor density, growth in advanced packaging (“More than Moore”) to connect these transistors more efficiently to the outside world and, as described in one of my earlier blog articles, more new computer architectures, such as neuromorphic and quantum computing. Each of these technology vectors will work in conjunction with the others. It’s not a one-or-the-other kind of choice for the industry.
The “More than Moore" advanced packaging is becoming more and more important for customers. Companies are using 2D redistribution wiring, 2.5D interposers and 3D integration. All these methods bring different chips closer together, enabling higher functional density for faster chip-to-chip communication, better performance and lower latency.
To use an analogy, imagine that you no longer have to drive to another site of your company for a meeting because the department has moved into a building directly across the street from you. Instead of driving for miles, you now just go to the other building and can talk to your colleagues.
Heterogeneous integration is the next step towards tapping into the technological advantages of advanced packaging. At its core, heterogenous integration breaks apart what would be a monolithic chip into smaller chips and then reconnects these smaller chips using advanced packaging to reform the basic functionality of a monolithic chip. Why would the semiconductor industry want to do this? There are multiple reasons. Breaking a large monolithic die into smaller dies gives chip designers a greater flexibility to optimize products at the system level. It produces a higher yield at the same defect density in order to enable faster time-to-market for new products. Chip manufacturers can independently optimize the process node manufacturing selection of different chip components and can finalize chip composition at the packaging stage rather than months earlier.
For example, our photoresist materials for mid-end to back-end photolithography are crucial here. They enable wafer surfaces to be as uniformly structured as possible, not to bend, and thus easier to bond. This is key, given that they are just a few nanometers in size.
Or, to stay with the aforementioned analogy, with help from EMD Electronics, your department and your colleagues’ departments are integrated, meaning you now sit in the same office. In terms of efficiency, this is hard to beat.
And of course, our R&D experts are developing new technologies. While existing EMD Electronics product lines fit several packaging areas, we are nevertheless working to broaden advanced packaging technologies at EMD Electronics.
My résumé at this point is therefore: Heterogeneous integration is driven by customer requirements and their benefits in the delivery of customized products. This makes the manufacture of new products significantly more efficient than with monolithic approaches. Efficiency always means speed. This is also imperative as computing power increases and must be made available at affordable prices in order to meet global technology needs in the future. 5G, cloud or edge computing would be unthinkable without it. That's why we are certain that heterogeneous integration will further revolutionize the semiconductor industry in the coming years and contribute significantly to its continued growth. EMD Electronics is actively participating in this revolution and we are making a significant contribution to driving this growth with our materials and solutions.